In this role you will be part of Synopsys world-wide Signal and Power Integrity (SIPI) team to work on high-speed interface PHY IP SI models (IBIS and IBIS-AMI) generation, verification, development and signal and power integrity related customer application

Responsibilities

Responsible for executing PHY IBIS/IBIS-AMI model generation, correlation, release and customer support

Responsible for refining the PHY IBIS/IBIS-AMI model generation and verification flow

IP products include SerDes PHYs (e.g. PCIe, USB, HDMI, MIPI, Ethernet up to 224Gbps) and DDR/LPDDR/HBM/UCIe PHY.

Modeling, reviewing, simulating and analyzing Power Delivery Network (PDN), floorplans, bump maps

Perform signal integrity analysis of SoC, package and PCB interconnects.


Requirements

BSEE required, MSEE preferred

3+ years’ experience in on die signal and power integrity, preferred to have working knowledge on high speed SerDes Tx/Rx/CDR/DFE circuits and architecture.

Knowledge on SerDes PHY interface protocols such as PCIe, Ethernet, SATA, MIPI, HDMI is required

Familiarity with programming and scripting languages such as Python, Perl, TCL, C++

Familiarity with UNIX/Linux system and commands

Hands-on industrial experience on MATLAB and Simulink are needed

Hands-on industrial experience on simulators such as ADS, QCD, HSPICE are preferred.

SerDes and/or PCB design experience is desired

Deep understanding of transmission line theory, signal conditioning methods and modeling is preferred

Experience with 3D field solver tools such as HFSS, SIwave is a plus

Good English verbal communication skill is preferred