What will be accountable for?

Responsibilities would include but are also not limited to

. contribute in all parts of Product Memory development flow, starting at design spec

. Understand Memory design and development, analyze memory marginality in advance technology(28nm and below)

. Understand and perform circuit design, memory characterization, and related verifications needed for the memories to work seamlessly in CPUs and SOCs

. Experiment with and evaluate new memory architectures and methodologies

. Work with other key designers to continually define, improve and develop memory infrastructure and methods

. Ensure high quality and high performance memory designs with the lowest possible power as needed for ARM CPUs, GPUs, and SOCs

. Lead small teams of circuit and layout designers throughout the entire memory development process

. Provide mentoring and leadership to other designers on the team

. Define and drive improvements in the memory development infrastructure and flows

. Work with project management to define schedule and highlight risks and issues. Interact with customers as needed throughout the course of the memory development

Job Requirements

Essential Skills & Experience

. A minimum of 8 years of relevant circuit design experience(for BSEE)

. A minimum of 6 years of relevant circuit design experience(for MSEE)

. Memory circuit design experience

. Circuit/Layout experience with deep submicron technologies(28nm or smaller)

. Fundamental understanding of technology tradeoffs in deep sub-micron design

. Fundamental understanding of Design for Manufacturability(DFM) layout techniques

. Experience in low power circuit techniques

. Experience lead small teams to develop high performance, low power memories

. Experience mentoring other engineers

. Experience defining and driving key methodologies for high performance, low power memory development

Desirable Skills & Experience

. Experience with simulator tools, Spectre, HSPICE, MMSIM, Finesim, etc.

. Be familiar with layout automation tools as well as physical verification tools like Calibre and Hercules

. Be familiar with the other EDA tools such as Design Compiler, IC Compiler, PrimeTime, SoC Encounter, Pacific, Nanosim, Pathmill, etc.

. Programming or scripting experience