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更新:2024-03-30
Sr./Staff ASIC Design Engineer - J10880
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成都  | 5-10年  | 社招
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五险一金
股票期权
绩效奖金
带薪年假
年度旅游
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Position Overview:
The candidate will join a team of highly competent ASIC designers involved in design, verification, and implementation (ASIC) of advanced platform for OmniVision's products.


Responsibilities:
1. Develop the architecture of block

2. Develop RTL of blocks and provide related documents

3. Develop verification plan and execute thorough block level simulation

4. Participate in the block-level synthesis, code coverage analysis

5. Participate in the FPGA prototyping

6. Assisting embedded FW development

Requirements:
1. Good knowledge of computer architecture and ASIC design flow

2. Good knowledge of Verilog, RTL design and writing test bench methodology

3. Good knowledge of synthesis, STA, logic equivalent check(LEC)

4. Knowledge of Unix Scripting, Perl and Tcl is a plus

5. Knowledge of Image processing/Peripheral/SOC is a plus

6. Good knowledge of C/C++ to model RTL blocks for simulation and verification is a plus

7. Good learning capacity and strong ability of problem-solving

8. Good communication skills and strong teamwork ability

其他信息
语言要求:普通话
行业要求:全部行业
所属部门:ASIC Design
工作地址
成都-高新区AI创新中心-B区
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