验证、设计 背景，善于沟通交流就行了，乐意做些项目管理的工作就行


KEY RESPONSIBILITIES:
Collaborate with design/verification/synthesis/physical design/SOC/FW/SW team to understand and define requirements for high-speed, low power digital circuit designs from definition to implementation.

Drive for all aspects of the functional verification from initial test planning, test creation and debug. to coverage and sign-off closure.

Possesses a thorough knowledge of the principles of project management and can apply them effectively on small to large size projects

Provides unique views of project status updates and facilitates cross development team dependencies and communications

Identify action or mitigation plans for issues or risks that arise during the project lifecycle

Collaborates with core teams and execution teams to identify areas that require special attention or escalations to identify corrective actions

Collect, analyze, organize and publish work performance data via dashboards and recurring status reports
PREFERRED EXPERIENCE:
Over 5 years of digital IP design, verification, advanced knowledge of ASIC/SOC Design flow and state of the art verification flow

Scripting language experience: Python, TCL, VBA, Perl, Ruby, Makefile, shell is a big plus.

Proficient with Verilog, System Verilog and UVM, Systemc, C++ based verification frameworks, testbenches, processes and flows.

Proficient in working in Linux and Windows environments.

Familiarity with power aware simulation and firmware/hardware co-verification is a plus.

Familiarity with industry standard high-speed protocols such as USB, PCIE, UFS, SATA, Ethernet is a plus.

Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus.

Automating workflows in a distributed compute environment.

Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality

PMP, PRINCE2 etc. project management knowledge is a big plus

ACADEMIC CREDENTIALS:

其他信息
语言要求：英语
行业要求：全部行业