职责描述：
1. High performance Transceiver design, including data-clock recovery circuit(CDR), AFE and DFE related ISI compensation circuit and adaptation algorithm design, high speed P2S/S2P circuit design.
2. High performance clock circuit and PLL design
3. Analog and calibration related circuit design, including ADC/DAC/Bandgap/LDO and so on.
4. Automotive Serdes circuit design.
任职要求：
1. Over 3 years mixed-signal or analog circuit design experience.
2. Knowledge on automotive system design and ISO26262 development procedure is preferred.
3. Familiar with mixed-signal and analog simulation tools.
4. Familiar with the protocols like PCIE/USB/DP/HDMI/Rapid IO/ MIPI A/C/D/M PHY etc. is preferred.
5. Familiar with Die-to-Die interconnection architecture and algorithm is preferred.
6. Experience on automotive SerDes chip design is preferred.
7. Experience on PHY architecture and algorithm design is preferred.