Digitalverification Engineer works in verification of digital and mixed-signal ICs
utilizing leading edge technologies with industry standard ASIC tools. Products
to be designed/verified include, power management, and mixed signal functions.

数字验证工程师负责使用先进验证方法和工业级标准ASIC工具完成数字和数模混合芯片的验证工作。产品包括电压管理和数模混合功能芯片。

Responsibilities岗位职责:

·          Contributes to the
verification of digital / mixed-signal IC’s 完成数字和数模混合芯片的验证工作

·          Build test bench, test cases
and code module/system level verification models 搭建验证平台，测试用例，编写模块机/系统级验证模型

·          Build test documents, record
test results and coverage 编写验证文档，记录测试结果和覆盖率

·          verification test cases/IP
using standard RTL/DV languages (Verilog, SysVerilog, UVM) 使用Verilog，SYSVerilog，UVM，测试用例和验证IP完成验证工作

·          Knowledge & Use of
industry standard ASIC tools/flow for daily work: Digital Simulators, synthesis
tools, DFT, LEC, STA, etc. 有以下设计工具和设计流程知识：数字仿真器、综合工具、DFT、LEC、STA等

·          Assist test/debug/FGPA
verification 协助测试和FPGA验证

Requirements岗位要求:

·        Master degree in Elec
Engineering Science or equivalent 电子工程或相近专业硕士

·        (preferred) ASIC design,
verification, or related work experience 有ASIC设计、验证或相关经验优先

·        Good written/verbal
communication English skills and strong team work/collaboration 良好的读写和口头英语能力和团队沟通能力

·        Ability to work independently,
follow instructions according to design specifications, and executing tasks to
hit milestones with quality 能独立遵循设计规则，高质量地完成工作

·          Familiar with programming,
scripting and automation languages like Perl/TCL/Unix/Python 熟悉Perl/TCL/Unix/Python脚本